Package iverilog
Icarus Verilog is a verilog compiler and simulator
https://github.com/steveicarus/iverilog
Icarus Verilog is a Verilog compiler that generates a variety of
engineering formats, including simulation. It strives to be true
to the IEEE-1364 standard.
Version: 12.0
General Commands | |
| iverilog | Icarus Verilog compiler |
| iverilog-vpi | Compile front end for VPI modules |
| vvp | Icarus Verilog vvp runtime engine |