nvme_feat - Man Page

enum nvme_feat {
   NVME_FEAT_ARBITRATION_BURST_SHIFT ,

   NVME_FEAT_ARBITRATION_BURST_MASK ,

   NVME_FEAT_ARBITRATION_LPW_SHIFT ,

   NVME_FEAT_ARBITRATION_LPW_MASK ,

   NVME_FEAT_ARBITRATION_MPW_SHIFT ,

   NVME_FEAT_ARBITRATION_MPW_MASK ,

   NVME_FEAT_ARBITRATION_HPW_SHIFT ,

   NVME_FEAT_ARBITRATION_HPW_MASK ,

   NVME_FEAT_PWRMGMT_PS_SHIFT ,

   NVME_FEAT_PWRMGMT_PS_MASK ,

   NVME_FEAT_PWRMGMT_WH_SHIFT ,

   NVME_FEAT_PWRMGMT_WH_MASK ,

   NVME_FEAT_LBAR_NR_SHIFT ,

   NVME_FEAT_LBAR_NR_MASK ,

   NVME_FEAT_TT_TMPTH_SHIFT ,

   NVME_FEAT_TT_TMPTH_MASK ,

   NVME_FEAT_TT_TMPSEL_SHIFT ,

   NVME_FEAT_TT_TMPSEL_MASK ,

   NVME_FEAT_TT_THSEL_SHIFT ,

   NVME_FEAT_TT_THSEL_MASK ,

   NVME_FEAT_ERROR_RECOVERY_TLER_SHIFT ,

   NVME_FEAT_ERROR_RECOVERY_TLER_MASK ,

   NVME_FEAT_ERROR_RECOVERY_DULBE_SHIFT ,

   NVME_FEAT_ERROR_RECOVERY_DULBE_MASK ,

   NVME_FEAT_VWC_WCE_SHIFT ,

   NVME_FEAT_VWC_WCE_MASK ,

   NVME_FEAT_NRQS_NSQR_SHIFT ,

   NVME_FEAT_NRQS_NSQR_MASK ,

   NVME_FEAT_NRQS_NCQR_SHIFT ,

   NVME_FEAT_NRQS_NCQR_MASK ,

   NVME_FEAT_IRQC_THR_SHIFT ,

   NVME_FEAT_IRQC_THR_MASK ,

   NVME_FEAT_IRQC_TIME_SHIFT ,

   NVME_FEAT_IRQC_TIME_MASK ,

   NVME_FEAT_ICFG_IV_SHIFT ,

   NVME_FEAT_ICFG_IV_MASK ,

   NVME_FEAT_ICFG_CD_SHIFT ,

   NVME_FEAT_ICFG_CD_MASK ,

   NVME_FEAT_WA_DN_SHIFT ,

   NVME_FEAT_WA_DN_MASK ,

   NVME_FEAT_AE_SMART_SHIFT ,

   NVME_FEAT_AE_SMART_MASK ,

   NVME_FEAT_AE_NAN_SHIFT ,

   NVME_FEAT_AE_NAN_MASK ,

   NVME_FEAT_AE_FW_SHIFT ,

   NVME_FEAT_AE_FW_MASK ,

   NVME_FEAT_AE_TELEM_SHIFT ,

   NVME_FEAT_AE_TELEM_MASK ,

   NVME_FEAT_AE_ANA_SHIFT ,

   NVME_FEAT_AE_ANA_MASK ,

   NVME_FEAT_AE_PLA_SHIFT ,

   NVME_FEAT_AE_PLA_MASK ,

   NVME_FEAT_AE_LBAS_SHIFT ,

   NVME_FEAT_AE_LBAS_MASK ,

   NVME_FEAT_AE_EGA_SHIFT ,

   NVME_FEAT_AE_EGA_MASK ,

   NVME_FEAT_APST_APSTE_SHIFT ,

   NVME_FEAT_APST_APSTE_MASK ,

   NVME_FEAT_HMEM_EHM_SHIFT ,

   NVME_FEAT_HMEM_EHM_MASK ,

   NVME_FEAT_HCTM_TMT2_SHIFT ,

   NVME_FEAT_HCTM_TMT2_MASK ,

   NVME_FEAT_HCTM_TMT1_SHIFT ,

   NVME_FEAT_HCTM_TMT1_MASK ,

   NVME_FEAT_NOPS_NOPPME_SHIFT ,

   NVME_FEAT_NOPS_NOPPME_MASK ,

   NVME_FEAT_RRL_RRL_SHIFT ,

   NVME_FEAT_RRL_RRL_MASK ,

   NVME_FEAT_PLM_PLME_SHIFT ,

   NVME_FEAT_PLM_PLME_MASK ,

   NVME_FEAT_PLMW_WS_SHIFT ,

   NVME_FEAT_PLMW_WS_MASK ,

   NVME_FEAT_LBAS_LSIRI_SHIFT ,

   NVME_FEAT_LBAS_LSIRI_MASK ,

   NVME_FEAT_LBAS_LSIPI_SHIFT ,

   NVME_FEAT_LBAS_LSIPI_MASK ,

   NVME_FEAT_SC_NODRM_SHIFT ,

   NVME_FEAT_SC_NODRM_MASK ,

   NVME_FEAT_EG_ENDGID_SHIFT ,

   NVME_FEAT_EG_ENDGID_MASK ,

   NVME_FEAT_EG_EGCW_SHIFT ,

   NVME_FEAT_EG_EGCW_MASK ,

   NVME_FEAT_SPM_PBSLC_SHIFT ,

   NVME_FEAT_SPM_PBSLC_MASK ,

   NVME_FEAT_HOSTID_EXHID_SHIFT ,

   NVME_FEAT_HOSTID_EXHID_MASK ,

   NVME_FEAT_RM_REGPRE_SHIFT ,

   NVME_FEAT_RM_REGPRE_MASK ,

   NVME_FEAT_RM_RESREL_SHIFT ,

   NVME_FEAT_RM_RESREL_MASK ,

   NVME_FEAT_RM_RESPRE_SHIFT ,

   NVME_FEAT_RM_RESPRE_MASK ,

   NVME_FEAT_RP_PTPL_SHIFT ,

   NVME_FEAT_RP_PTPL_MASK ,

   NVME_FEAT_WP_WPS_SHIFT ,

   NVME_FEAT_WP_WPS_MASK ,

   NVME_FEAT_IOCSP_IOCSCI_SHIFT ,

   NVME_FEAT_IOCSP_IOCSCI_MASK ,

   NVME_FEAT_FDP_ENABLED_SHIFT ,

   NVME_FEAT_FDP_ENABLED_MASK ,

   NVME_FEAT_FDP_INDEX_SHIFT ,

   NVME_FEAT_FDP_INDEX_MASK ,

   NVME_FEAT_FDP_EVENTS_ENABLE_SHIFT ,

   NVME_FEAT_FDP_EVENTS_ENABLE_MASK

};

NVME_FEAT_ARBITRATION_BURST_SHIFT

NVME_FEAT_ARBITRATION_BURST_MASK

NVME_FEAT_ARBITRATION_LPW_SHIFT

NVME_FEAT_ARBITRATION_LPW_MASK

NVME_FEAT_ARBITRATION_MPW_SHIFT

NVME_FEAT_ARBITRATION_MPW_MASK

NVME_FEAT_ARBITRATION_HPW_SHIFT

NVME_FEAT_ARBITRATION_HPW_MASK

NVME_FEAT_PWRMGMT_PS_SHIFT

NVME_FEAT_PWRMGMT_PS_MASK

NVME_FEAT_PWRMGMT_WH_SHIFT

NVME_FEAT_PWRMGMT_WH_MASK

NVME_FEAT_LBAR_NR_SHIFT

NVME_FEAT_LBAR_NR_MASK

NVME_FEAT_TT_TMPTH_SHIFT

NVME_FEAT_TT_TMPTH_MASK

NVME_FEAT_TT_TMPSEL_SHIFT

NVME_FEAT_TT_TMPSEL_MASK

NVME_FEAT_TT_THSEL_SHIFT

NVME_FEAT_TT_THSEL_MASK

NVME_FEAT_ERROR_RECOVERY_TLER_SHIFT

NVME_FEAT_ERROR_RECOVERY_TLER_MASK

NVME_FEAT_ERROR_RECOVERY_DULBE_SHIFT

NVME_FEAT_ERROR_RECOVERY_DULBE_MASK

NVME_FEAT_VWC_WCE_SHIFT

NVME_FEAT_VWC_WCE_MASK

NVME_FEAT_NRQS_NSQR_SHIFT

NVME_FEAT_NRQS_NSQR_MASK

NVME_FEAT_NRQS_NCQR_SHIFT

NVME_FEAT_NRQS_NCQR_MASK

NVME_FEAT_IRQC_THR_SHIFT

NVME_FEAT_IRQC_THR_MASK

NVME_FEAT_IRQC_TIME_SHIFT

NVME_FEAT_IRQC_TIME_MASK

NVME_FEAT_ICFG_IV_SHIFT

NVME_FEAT_ICFG_IV_MASK

NVME_FEAT_ICFG_CD_SHIFT

NVME_FEAT_ICFG_CD_MASK

NVME_FEAT_WA_DN_SHIFT

NVME_FEAT_WA_DN_MASK

NVME_FEAT_AE_SMART_SHIFT

NVME_FEAT_AE_SMART_MASK

NVME_FEAT_AE_NAN_SHIFT

NVME_FEAT_AE_NAN_MASK

NVME_FEAT_AE_FW_SHIFT

NVME_FEAT_AE_FW_MASK

NVME_FEAT_AE_TELEM_SHIFT

NVME_FEAT_AE_TELEM_MASK

NVME_FEAT_AE_ANA_SHIFT

NVME_FEAT_AE_ANA_MASK

NVME_FEAT_AE_PLA_SHIFT

NVME_FEAT_AE_PLA_MASK

NVME_FEAT_AE_LBAS_SHIFT

NVME_FEAT_AE_LBAS_MASK

NVME_FEAT_AE_EGA_SHIFT

NVME_FEAT_AE_EGA_MASK

NVME_FEAT_APST_APSTE_SHIFT

NVME_FEAT_APST_APSTE_MASK

NVME_FEAT_HMEM_EHM_SHIFT

NVME_FEAT_HMEM_EHM_MASK

NVME_FEAT_HCTM_TMT2_SHIFT

NVME_FEAT_HCTM_TMT2_MASK

NVME_FEAT_HCTM_TMT1_SHIFT

NVME_FEAT_HCTM_TMT1_MASK

NVME_FEAT_NOPS_NOPPME_SHIFT

NVME_FEAT_NOPS_NOPPME_MASK

NVME_FEAT_RRL_RRL_SHIFT

NVME_FEAT_RRL_RRL_MASK

NVME_FEAT_PLM_PLME_SHIFT

NVME_FEAT_PLM_PLME_MASK

NVME_FEAT_PLMW_WS_SHIFT

NVME_FEAT_PLMW_WS_MASK

NVME_FEAT_LBAS_LSIRI_SHIFT

NVME_FEAT_LBAS_LSIRI_MASK

NVME_FEAT_LBAS_LSIPI_SHIFT

NVME_FEAT_LBAS_LSIPI_MASK

NVME_FEAT_SC_NODRM_SHIFT

NVME_FEAT_SC_NODRM_MASK

NVME_FEAT_EG_ENDGID_SHIFT

NVME_FEAT_EG_ENDGID_MASK

NVME_FEAT_EG_EGCW_SHIFT

NVME_FEAT_EG_EGCW_MASK

NVME_FEAT_SPM_PBSLC_SHIFT

NVME_FEAT_SPM_PBSLC_MASK

NVME_FEAT_HOSTID_EXHID_SHIFT

NVME_FEAT_HOSTID_EXHID_MASK

NVME_FEAT_RM_REGPRE_SHIFT

NVME_FEAT_RM_REGPRE_MASK

NVME_FEAT_RM_RESREL_SHIFT

NVME_FEAT_RM_RESREL_MASK

NVME_FEAT_RM_RESPRE_SHIFT

NVME_FEAT_RM_RESPRE_MASK

NVME_FEAT_RP_PTPL_SHIFT

NVME_FEAT_RP_PTPL_MASK

NVME_FEAT_WP_WPS_SHIFT

NVME_FEAT_WP_WPS_MASK

NVME_FEAT_IOCSP_IOCSCI_SHIFT

NVME_FEAT_IOCSP_IOCSCI_MASK

NVME_FEAT_FDP_ENABLED_SHIFT

NVME_FEAT_FDP_ENABLED_MASK

NVME_FEAT_FDP_INDEX_SHIFT

NVME_FEAT_FDP_INDEX_MASK

NVME_FEAT_FDP_EVENTS_ENABLE_SHIFT

NVME_FEAT_FDP_EVENTS_ENABLE_MASK